EPC2LC20CAD vs EPC2LC120 Comparación
Comparación detallada lado a lado de EPC2LC20CAD por Altera y EPC2LC120 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPC2LC20CAD | EPC2LC120 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | Memory ICs | Memory ICs |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,75 | $9,95 |
| Tipo de memoria | Configuration PROM (Flash) | — |
| Memory Capacity | 1.6 Mbit | — |
| Tensión de alimentación | 3.3 V (nominal) | 3.3 V |
| I/O Voltage Tolerance | 5 V tolerant | — |
| Configuration Mode | Serial (bit-wide, Altera FPGAs) | — |
| Program Interface | IEEE Std 1149.1 JTAG (in-system programmable) | — |
| Encapsulado | 20-pin J-lead PLCC (PLCC-20) | PLCC-120 |
| Recuento de pines | 20 | 120 |
| Temperatura de funcionamiento | -40C to +85C (commercial) | [DATA_NEEDED: operating temperature range] |
| Maximum Input Voltage (DC) | -0.3 V to +7.0 V | — |
| Input Undershoot/Overshoot | -2.0 V to +7.0 V for <100 mA, <20 ns no-load | — |
| Compatible FPGA Families | APEX 20K, ACEX 1K, Cyclone, Stratix | FLEX, ACEX, APEX, Mercury (Altera) |
| Programming Method | JTAG ISP (no external programmer required) | — |
| Estado RoHS | Compliant | — |
| Tipo de montaje | Surface Mount / Through-hole (PLCC socket) | Surface Mount / Socket |
| Función | — | FPGA Configuration Memory Device |
| Memory Density | — | 2 Mbit |
| Programming Interface | — | JTAG IEEE 1149.1 |
| Configuration Modes | — | PS (serial), PPA (parallel), multi-device daisy chain |
| Storage Temperature | — | [DATA_NEEDED: storage temperature] |
| Nivel MSL | — | [DATA_NEEDED: MSL rating] |
| Lead-Free / RoHS | — | [DATA_NEEDED: RoHS status] |
| Data Compression Support | — | Yes (Altera proprietary, up to 2:1) |
| Remote Update Support | — | Yes (via JTAG multi-mode protocol) |