EPC2LI20U vs EPC1441LI20 Comparación
Comparación detallada lado a lado de EPC2LI20U por Altera y EPC1441LI20 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPC2LI20U | EPC1441LI20 |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | Memory ICs | Memory ICs |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $7,10 | $8,10 |
| Tipo de memoria | Configuration PROM (serial EEPROM) | OTP Configuration PROM (PROM) |
| Tamaño de memoria | 1.6 Mbit (65,536 x 1-bit device) | — |
| Supply Voltage (VCC) | 3.0 V to 5.5 V (5.0 V nominal) | — |
| Programming Voltage | 5.0 V (via internal charge pump) | — |
| Configuration Interface | Serial 4-pin (DATA, DCLK, nCS, OE) | Altera 4-pin serial (DATA, DCLK, nCONFIG, nSTATUS) |
| Maximum DCLK Frequency | 33 MHz (fast mode) | — |
| Rango de temperatura de funcionamiento | -40 C to +85 C (industrial) | — |
| Encapsulado | 20-pin PLCC (9x9 mm) | 20-pin PLCC (J-lead, 9x9 mm) |
| Tipo de montaje | Surface Mount (PLCC socket) | — |
| Programmability | In-system programmable via JTAG (IEEE 1149.1) | — |
| Cascade Support | Yes (via nCASC pin) | — |
| Device ID | 32-bit JTAG-readable | — |
| Supported FPGA Families | APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 6000/10KE/10KA | ACEX, APEX 20K / 20KC / 20KE, FLEX 10KE, FLEX 10KA, Mercury |
| Estado RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS compliance status] |
| Nivel MSL | [DATA_NEEDED: MSL moisture sensitivity level] | [DATA_NEEDED: MSL rating] |
| Density | — | 441 kbits (440,800 bits) |
| Number of Words | — | 440,800 |
| Bits per Word | — | 1 bit |
| Tensión de alimentación | — | 3.3 V |
| Temperatura de funcionamiento | — | -40 C to +85 C (industrial) |
| Pin Pitch | — | 1.27 mm |
| Programming Method | — | One-Time-Programmable via Altera programming hardware |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Configuration Time | — | Depends on FPGA bitstream length and DCLK frequency |