EPC2LI20U vs EPC1441LI20 Vergleich
Detaillierter Direktvergleich von EPC2LI20U von Altera und EPC1441LI20 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC2LI20U | EPC1441LI20 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $7,10 | $8,10 |
| Speichertyp | Configuration PROM (serial EEPROM) | OTP Configuration PROM (PROM) |
| Speichergröße | 1.6 Mbit (65,536 x 1-bit device) | — |
| Supply Voltage (VCC) | 3.0 V to 5.5 V (5.0 V nominal) | — |
| Programming Voltage | 5.0 V (via internal charge pump) | — |
| Configuration Interface | Serial 4-pin (DATA, DCLK, nCS, OE) | Altera 4-pin serial (DATA, DCLK, nCONFIG, nSTATUS) |
| Maximum DCLK Frequency | 33 MHz (fast mode) | — |
| Betriebstemperaturbereich | -40 C to +85 C (industrial) | — |
| Gehäuse | 20-pin PLCC (9x9 mm) | 20-pin PLCC (J-lead, 9x9 mm) |
| Montageart | Surface Mount (PLCC socket) | — |
| Programmability | In-system programmable via JTAG (IEEE 1149.1) | — |
| Cascade Support | Yes (via nCASC pin) | — |
| Device ID | 32-bit JTAG-readable | — |
| Supported FPGA Families | APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 6000/10KE/10KA | ACEX, APEX 20K / 20KC / 20KE, FLEX 10KE, FLEX 10KA, Mercury |
| RoHS-Status | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS compliance status] |
| MSL-Level | [DATA_NEEDED: MSL moisture sensitivity level] | [DATA_NEEDED: MSL rating] |
| Density | — | 441 kbits (440,800 bits) |
| Number of Words | — | 440,800 |
| Bits per Word | — | 1 bit |
| Versorgungsspannung | — | 3.3 V |
| Betriebstemperatur | — | -40 C to +85 C (industrial) |
| Pin Pitch | — | 1.27 mm |
| Programming Method | — | One-Time-Programmable via Altera programming hardware |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Configuration Time | — | Depends on FPGA bitstream length and DCLK frequency |