EPC2LI20U vs EPC2LI20J Comparación
Comparación detallada lado a lado de EPC2LI20U por Altera y EPC2LI20J por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPC2LI20U | EPC2LI20J |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | Memory ICs | Memory ICs |
| Estado del ciclo de vida | Obsolete | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $7,10 | $9,75 |
| Tipo de memoria | Configuration PROM (serial EEPROM) | In-System Programmable Configuration PROM (flash) |
| Tamaño de memoria | 1.6 Mbit (65,536 x 1-bit device) | 1,695,680 bits (1.6Mb) |
| Supply Voltage (VCC) | 3.0 V to 5.5 V (5.0 V nominal) | — |
| Programming Voltage | 5.0 V (via internal charge pump) | — |
| Configuration Interface | Serial 4-pin (DATA, DCLK, nCS, OE) | — |
| Maximum DCLK Frequency | 33 MHz (fast mode) | — |
| Rango de temperatura de funcionamiento | -40 C to +85 C (industrial) | — |
| Encapsulado | 20-pin PLCC (9x9 mm) | 20-pin PLCC with J-leads (JEDEC MS-018) |
| Tipo de montaje | Surface Mount (PLCC socket) | — |
| Programmability | In-system programmable via JTAG (IEEE 1149.1) | — |
| Cascade Support | Yes (via nCASC pin) | Yes (multi-device configuration chain) |
| Device ID | 32-bit JTAG-readable | — |
| Supported FPGA Families | APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 6000/10KE/10KA | — |
| Estado RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS compliance status] |
| Nivel MSL | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| Organización de memoria | — | 65,536 x 1-bit (serial interface) |
| Interfaz | — | Altera 4-pin serial configuration (DATA, DCLK, nCS, nCONFIG) |
| Target FPGAs | — | APEX II, APEX 20K/20KC/20KE, Mercury, ACEX 1K, FLEX 6000/10KE/10KA |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V (3.3 V typical) |
| I/O Voltage (VCCIO) | — | 5.0 V or 3.3 V tolerant |
| ISP Programming Interface | — | JTAG (IEEE 1149.1) |
| Internal Oscillator | — | Yes (configures without external clock source) |
| Temperatura de funcionamiento | — | -40C to +85C (industrial) |
| Programming Cycles | — | [DATA_NEEDED: minimum endurance cycles] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Configuration Clock (DCLK) | — | Up to 33 MHz |