EPF10K100BQC208-1 vs EPF10K100EQC208-2 Comparación
Comparación detallada lado a lado de EPF10K100BQC208-1 por Altera y EPF10K100EQC208-2 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPF10K100BQC208-1 | EPF10K100EQC208-2 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $21,20 | $155,85 |
| Series | FLEX-10K | FLEX 10KE |
| Family | FLEX 10K (SRAM-based FPGA) | — |
| Logic Elements | 576 | — |
| Total RAM Bits | 6144 | 49,152 bits |
| Number of Gates | [DATA_NEEDED: typical gate count] | — |
| Number of I/O | [DATA_NEEDED: user I/O count] | — |
| Tensión de alimentación | 4.75 V to 5.25 V | — |
| Combinatorial tpd (typ.) | 11 ns | — |
| Speed Grade | -1 | -2 |
| Temperatura de funcionamiento | [DATA_NEEDED: industrial/commercial grade] | 0 C to +70 C (Commercial) |
| Encapsulado | 208-BFQFP (PQFP-208, 28x28 mm) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Configuration Memory | SRAM (volatile, in-system reconfigurable) | — |
| Estado RoHS | [DATA_NEEDED: not stated in provided data] | [DATA_NEEDED: not in provided source data] |
| Lead-Free | [DATA_NEEDED: not stated in provided data] | — |
| Product Type | — | FPGA (Field Programmable Gate Array) |
| Typical Gate Count | — | 100,000 gates |
| Logic Elements (LEs) | — | 4,992 |
| Logic Array Blocks (LABs) | — | 624 |
| Embedded Array Blocks (EABs) | — | 12 x 2,048 bits |
| Maximum User I/O | — | 147 |
| Supply Voltage - Core (VCCINT) | — | 2.375 V to 2.625 V |
| Supply Voltage - I/O (VCCIO) | — | [DATA_NEEDED: VCCIO range, not in source data] |
| Encapsulado / Carcasa | — | 208-BFQFP (PQFP, 28x28 mm) |
| Terminal Form | — | Gull Wing |
| Number of Terminals | — | 208 |
| JTAG Support | — | Yes (IEEE 1149.1 boundary-scan) |
| Configuration Method | — | Serial EEPROM / passive serial / JTAG |