EPF10K100BQC208-1 vs EPF10K100EQC208-2 Comparaison
Comparaison détaillée côte à côte de EPF10K100BQC208-1 par Altera et EPF10K100EQC208-2 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPF10K100BQC208-1 | EPF10K100EQC208-2 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $21,20 | $155,85 |
| Series | FLEX-10K | FLEX 10KE |
| Family | FLEX 10K (SRAM-based FPGA) | — |
| Logic Elements | 576 | — |
| Total RAM Bits | 6144 | 49,152 bits |
| Number of Gates | [DATA_NEEDED: typical gate count] | — |
| Number of I/O | [DATA_NEEDED: user I/O count] | — |
| Tension d'alimentation | 4.75 V to 5.25 V | — |
| Combinatorial tpd (typ.) | 11 ns | — |
| Speed Grade | -1 | -2 |
| Température de fonctionnement | [DATA_NEEDED: industrial/commercial grade] | 0 C to +70 C (Commercial) |
| Boîtier | 208-BFQFP (PQFP-208, 28x28 mm) | — |
| Type de montage | Surface Mount | Surface Mount |
| Configuration Memory | SRAM (volatile, in-system reconfigurable) | — |
| Statut RoHS | [DATA_NEEDED: not stated in provided data] | [DATA_NEEDED: not in provided source data] |
| Lead-Free | [DATA_NEEDED: not stated in provided data] | — |
| Product Type | — | FPGA (Field Programmable Gate Array) |
| Typical Gate Count | — | 100,000 gates |
| Logic Elements (LEs) | — | 4,992 |
| Logic Array Blocks (LABs) | — | 624 |
| Embedded Array Blocks (EABs) | — | 12 x 2,048 bits |
| Maximum User I/O | — | 147 |
| Supply Voltage - Core (VCCINT) | — | 2.375 V to 2.625 V |
| Supply Voltage - I/O (VCCIO) | — | [DATA_NEEDED: VCCIO range, not in source data] |
| Boîtier / Format | — | 208-BFQFP (PQFP, 28x28 mm) |
| Terminal Form | — | Gull Wing |
| Number of Terminals | — | 208 |
| JTAG Support | — | Yes (IEEE 1149.1 boundary-scan) |
| Configuration Method | — | Serial EEPROM / passive serial / JTAG |