EPF10K200EFC672-3 vs EPF10K250EFI672-3 Comparación
Comparación detallada lado a lado de EPF10K200EFC672-3 por Intel y EPF10K250EFI672-3 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPF10K200EFC672-3 - FLEX 10KE FPGA 9984 Cells 470 I/O BGA-672 | Intel
EPF10K200EFC672-3 Obsolete
Comparación de especificaciones
| Parámetro | EPF10K200EFC672-3 | EPF10K250EFI672-3 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $115,00 | $125,00 |
| Series | FLEX 10KE | — |
| Number of Logic Elements / Cells | 9,984 | — |
| Number of LABs / CLBs | 1248 | — |
| Total RAM Bits | 98,304 bits (12 EABs of 8 Kbits) | — |
| Number of I/O | 470 | — |
| Number of Gates (typical) | 200,000 | — |
| Supply Voltage - Operating | 2.3 V to 2.7 V (2.5 V nominal) | — |
| Process Technology | 0.22 µm CMOS | CMOS, SRAM-based configuration |
| Maximum Operating Frequency | 166.67 MHz | — |
| Propagation Delay | 0.4 ns | — |
| Encapsulado / Carcasa | 672-BBGA (27 x 27 mm, 1.0 mm pitch, FineLine BGA) | — |
| Tipo de montaje | Surface Mount | — |
| Temperatura de funcionamiento | 0 °C to +70 °C (commercial) | 0 °C to 70 °C (commercial) |
| Configuration Memory | SRAM-based (volatile, requires external configuration device) | — |
| Number of PLLs | 4 | — |
| Estado RoHS | [DATA_NEEDED: rohs status] | Unknown (legacy Altera non-RoHS device) |
| Nivel MSL | [DATA_NEEDED: MSL level] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Family | — | FLEX 10KE |
| Typical Gates | — | 250,000 |
| Logic Elements | — | [DATA_NEEDED: exact LE count] |
| User I/O Pins | — | 470 |
| Embedded Array Blocks (EABs) | — | 12 |
| EAB Dual-Port Width | — | Up to 16-bit |
| Maximum EAB Memory | — | [DATA_NEEDED: bits per EAB] |
| Propagation Delay (tpd) | — | 0.4 ns (typical, -3 speed grade) |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage | — | 2.5 V / 3.3 V (multiVolt I/O) |
| Encapsulado | — | 672-ball FineLine BGA, 1.27 mm pitch |
| Configuration Interface | — | JTAG / ByteBlaster (EPC2/EPC8 PROM) |
| Design Entry | — | EDIF 2 0 0 / 3 0 0, LPM, VHDL, Verilog |