EPF81188AGC232-2 vs EPF81188AGC232-2A Comparación
Comparación detallada lado a lado de EPF81188AGC232-2 por Altera y EPF81188AGC232-2A por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPF81188AGC232-2 | EPF81188AGC232-2A |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $92,00 | $92,00 |
| Family | FLEX 8000 | FLEX 8000 |
| Usable Gates | 12,000 | 12,000 |
| Logic Elements (LEs) | 1,008 | — |
| Registers (max) | 1,500 | — |
| Maximum Operating Frequency | 125 MHz | — |
| Process Technology | 0.42 µm CMOS | 0.42 µm CMOS |
| Core Supply Voltage | 5 V | — |
| I/O Standards Supported | 3.3 V / 5 V configurable | — |
| Encapsulado | 232-pin CPGA (Ceramic Pin Grid Array) | CPGA-232 (Ceramic Pin Grid Array, 232 pins) |
| Tipo de montaje | Through-hole | Through-Hole (CPGA) |
| User I/O Pins | 192 | 184 |
| Configuration Method | SRAM, in-circuit reconfigurable (ICR) via external device or JTAG | — |
| JTAG Boundary Scan | Yes (IEEE 1149.1) | — |
| Operating Temperature Grade | Commercial | — |
| Speed Grade | -2 | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Logic Elements | — | 1,008 |
| Logic Cells | — | 1,008 |
| Maximum Internal Frequency | — | 125 MHz |
| Propagation Delay | — | 5 ns |
| Dedicated Inputs | — | 4 |
| Configuration Technology | — | SRAM (volatile, in-system reconfigurable) |
| I/O Voltage | — | 3.3 V or 5 V (configurable) |
| Temperatura de funcionamiento | — | [DATA_NEEDED: operating temperature grade] |
| In-Circuit Reconfigurability | — | Yes (external configuration device or intelligent host) |
| Boundary Scan | — | JTAG IEEE 1149.1 |
| Output Function | — | Registered (D-type flip-flop per LE) |