EPF81188AGC232-2 vs EPF81188AGC232-2A 对比

详细并排对比 EPF81188AGC232-2 出自 Altera 和 EPF81188AGC232-2A 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPF81188AGC232-2 EPF81188AGC232-2A
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $92.00 $92.00
Family FLEX 8000 FLEX 8000
Usable Gates 12,000 12,000
Logic Elements (LEs) 1,008 —
Registers (max) 1,500 —
Maximum Operating Frequency 125 MHz —
Process Technology 0.42 µm CMOS 0.42 µm CMOS
Core Supply Voltage 5 V —
I/O Standards Supported 3.3 V / 5 V configurable —
封装 232-pin CPGA (Ceramic Pin Grid Array) CPGA-232 (Ceramic Pin Grid Array, 232 pins)
安装类型 Through-hole Through-Hole (CPGA)
User I/O Pins 192 184
Configuration Method SRAM, in-circuit reconfigurable (ICR) via external device or JTAG —
JTAG Boundary Scan Yes (IEEE 1149.1) —
Operating Temperature Grade Commercial —
Speed Grade -2 —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance status]
Lead-Free [DATA_NEEDED: lead-free status] —
Logic Elements — 1,008
Logic Cells — 1,008
Maximum Internal Frequency — 125 MHz
Propagation Delay — 5 ns
Dedicated Inputs — 4
Configuration Technology — SRAM (volatile, in-system reconfigurable)
I/O Voltage — 3.3 V or 5 V (configurable)
工作温度 — [DATA_NEEDED: operating temperature grade]
In-Circuit Reconfigurability — Yes (external configuration device or intelligent host)
Boundary Scan — JTAG IEEE 1149.1
Output Function — Registered (D-type flip-flop per LE)

数据手册与资源

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