EPM1270F256I5N vs EPM1270F256C5 Comparación
Comparación detallada lado a lado de EPM1270F256I5N por Intel y EPM1270F256C5 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM1270F256I5N | EPM1270F256C5 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $14,85 | $25,40 |
| Series | MAX II | MAX II |
| Family | MAX II (EPM1270) | EPM1270 |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Macro Cells | 980 | 980 |
| Logic Elements | 1270 | — |
| User I/O Pins | 212 | — |
| User Flash Memory | 8 Kbits | 8 Kbits |
| Maximum Operating Frequency | 201.1 MHz | — |
| Pin-to-Pin Logic Delay | 6.2 ns (I5 speed grade) | — |
| External Supply Voltage | 2.5 V / 3.3 V | — |
| Internal Core Voltage | 1.8 V (on-chip regulator) | — |
| I/O Bank Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) + 3.3 V PCI-compliant bank | — |
| Process Technology | 0.18-micron Flash-based CMOS | 0.18 µm |
| Configuration Memory | Non-volatile Flash (instant-on) | On-chip flash (non-volatile, instant-on) |
| Programming Interface | JTAG IEEE 1149.1 (boundary-scan + ISP) | JTAG (IEEE 1149.1) / ISP via ByteBlaster / USB-Blaster |
| Encapsulado | 256-ball FBGA (FineLine BGA), 17 x 17 mm | 256-ball FineLine BGA (FBGA-256) |
| Temperatura de funcionamiento | -40C to +100C (TJ), industrial | 0 °C to +85 °C (commercial, 'C' grade) |
| Speed Grade | I5 (industrial, 6.2 ns tPD) | — |
| Tipo de montaje | Surface Mount (SMT, BGA) | — |
| Estado RoHS | Compliant | Compliant |
| Sin halógenos | Compliant (per GlobalSpec) | — |
| Country of Origin | Malaysia / Republic of Korea | — |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum User I/O Pins | — | 212 |
| Pin-to-Pin Logic Delay (tPD) | — | 6.2 ns (C5 speed grade) |
| Internal Operating Frequency | — | 201.1 MHz |
| Core Supply Voltage | — | 2.5 V / 3.3 V |
| I/O Standards Supported | — | LVCMOS/LVTTL 1.8 V, 2.5 V, 3.3 V, 5.0 V (MultiVolt) |