EPM3128ATC100-10NS vs EPM3128ATC100-7N Comparación
Comparación detallada lado a lado de EPM3128ATC100-10NS por Intel y EPM3128ATC100-7N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPM3128ATC100-7N - MAX 3000A 128-Macrocell CPLD, 7.5 ns, TQFP-100 | Intel (Altera)
EPM3128ATC100-7N NrndComparación de especificaciones
| Parámetro | EPM3128ATC100-10NS | EPM3128ATC100-7N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $6,50 | $3,52 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 128 | 128 |
| User I/Os | 80 | — |
| Recuento de pines | 100 | — |
| Encapsulado | TQFP-100 | TQFP-100 (100-pin TQFP, fine-line BGA-256 noted in third-party listings) |
| Pin-to-Pin Logic Delay (tPD) | 10 ns | — |
| Counter Frequency (fCNT) | up to 227.3 MHz | — |
| Supply Voltage - Core (VCCINT) | 3.3 V | — |
| Supply Voltage - I/O (VCCIO) | 3.3 V or 2.5 V (5.0 V-tolerant inputs) | — |
| Logic-Level Compatibility | 5.0 V, 3.3 V, 2.5 V | — |
| Programmability | In-system (ISP), IEEE Std. 1532 | — |
| Boundary Scan | IEEE 1149.1 JTAG | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | 0C to +70C (Commercial) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Usable Gates | — | Up to 10,000 |
| Number of I/Os | — | 80 |
| Number of Logic Array Blocks (LABs) | — | [DATA_NEEDED: LAB count] |
| Propagation Delay (tPD) | — | 7.5 ns |
| Counter Frequency (max) | — | 227.3 MHz |
| Supply Voltage - Core | — | 3.3 V |
| I/O Interface Levels | — | 5.0 V / 3.3 V / 2.5 V (MultiVolt I/O) |
| In-System Programmability | — | Yes (IEEE 1532 / JTAG) |
| Program Memory Type | — | EEPROM (non-volatile) |
| Logic Family | — | CMOS |
| Speed Grade | — | -7 |