EPM3128ATC100-10NS vs EPM3128ATC100-7N 对比
详细并排对比 EPM3128ATC100-10NS 出自 Intel 和 EPM3128ATC100-7N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPM3128ATC100-7N - MAX 3000A 128-Macrocell CPLD, 7.5 ns, TQFP-100 | Intel (Altera)
EPM3128ATC100-7N Nrnd规格对比
| 参数 | EPM3128ATC100-10NS | EPM3128ATC100-7N |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $6.50 | $3.52 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 128 | 128 |
| User I/Os | 80 | — |
| 引脚数量 | 100 | — |
| 封装 | TQFP-100 | TQFP-100 (100-pin TQFP, fine-line BGA-256 noted in third-party listings) |
| Pin-to-Pin Logic Delay (tPD) | 10 ns | — |
| Counter Frequency (fCNT) | up to 227.3 MHz | — |
| Supply Voltage - Core (VCCINT) | 3.3 V | — |
| Supply Voltage - I/O (VCCIO) | 3.3 V or 2.5 V (5.0 V-tolerant inputs) | — |
| Logic-Level Compatibility | 5.0 V, 3.3 V, 2.5 V | — |
| Programmability | In-system (ISP), IEEE Std. 1532 | — |
| Boundary Scan | IEEE 1149.1 JTAG | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| 工作温度 | [DATA_NEEDED: operating temperature range] | 0C to +70C (Commercial) |
| 安装类型 | Surface Mount | Surface Mount |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Usable Gates | — | Up to 10,000 |
| Number of I/Os | — | 80 |
| Number of Logic Array Blocks (LABs) | — | [DATA_NEEDED: LAB count] |
| Propagation Delay (tPD) | — | 7.5 ns |
| Counter Frequency (max) | — | 227.3 MHz |
| Supply Voltage - Core | — | 3.3 V |
| I/O Interface Levels | — | 5.0 V / 3.3 V / 2.5 V (MultiVolt I/O) |
| In-System Programmability | — | Yes (IEEE 1532 / JTAG) |
| Program Memory Type | — | EEPROM (non-volatile) |
| Logic Family | — | CMOS |
| Speed Grade | — | -7 |