EPM3512AFC256C vs EPM3512AFC256-10 Comparación
Comparación detallada lado a lado de EPM3512AFC256C por Intel y EPM3512AFC256-10 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPM3512AFC256C - MAX 3000A CPLD, 512 Macrocells, 208 I/O | Altera
EPM3512AFC256C ⚠ Última compraComparación de especificaciones
| Parámetro | EPM3512AFC256C | EPM3512AFC256-10 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $27,95 | $17,50 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 512 | 512 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum User I/Os | 208 | — |
| Dedicated Input Pins | 12 | — |
| Encapsulado | 256-ball FineLine BGA (FC) | 256-pin FBGA |
| Temperatura de funcionamiento | 0C to +70C (Commercial) | — |
| Speed Grade | C (per datasheet ordering code) | — |
| Configuration Technology | EEPROM (non-volatile, instant-on) | — |
| Core Voltage | 3.3 V | — |
| I/O Standards Supported | MultiVolt: 5.0 V, 3.3 V, 2.5 V | — |
| JTAG Support | IEEE 1149.1 Boundary Scan | — |
| PCI Compliance | PCI SIG Local Bus Specification Revision 2.2 | — |
| Programming | In-system programmable via JTAG | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | unknown |
| Tipo de montaje | Surface Mount | Surface Mount |
| Usable Gates | — | 10,000 |
| Maximum I/O Pins | — | 208 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 87 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Voltage Tolerance | — | 5-V tolerant |
| Programmable Technology | — | CMOS EEPROM |
| In-System Programmability | — | Yes (IEEE Std. 1149.1 JTAG / IEEE Std. 1532) |
| Rango de temperatura de funcionamiento | — | [DATA_NEEDED: industrial/commercial operating temperature range] |
| Recuento de pines | — | 256 |
| Architecture | — | MAX (Multiple Array matriX) EEPROM-based |