EPM3512ATC144 vs EPM3128ATC144-10 Comparación
Comparación detallada lado a lado de EPM3512ATC144 por Altera y EPM3128ATC144-10 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM3512ATC144 | EPM3128ATC144-10 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $8,75 | $6,20 |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 512 | — |
| Logic Array Blocks (LABs) | 16 | — |
| Maximum User I/O Pins | 212 | — |
| Encapsulado | TQFP-144 (20x20 mm) | 144-pin TQFP (TQ144) |
| Core Supply Voltage | 3.3 V | — |
| Programming Technology | EEPROM (in-system programmable) | — |
| JTAG Interface | IEEE Std. 1149.1 (4-pin) | — |
| Maximum Frequency | 116 MHz | — |
| Propagation Delay (tPD) | [DATA_NEEDED: tPD in ns] | 10 ns (speed grade -10) |
| Product Terms per Macrocell | 32 (expandable) | — |
| I/O Standards | LVTTL, LVCMOS, 2.5 V/3.3 V/5 V tolerant | — |
| Temperatura de funcionamiento | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Nivel MSL | 3 | — |
| Estado RoHS | Compliant (lead-free suffix variants available) | Compliant |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 128 |
| User I/Os | — | 96 |
| Usable Gates | — | 2,500 (typical) |
| Logic Elements / LABs | — | 4 Logic Array Blocks |
| Counter Frequency (fCNT) | — | Up to 227.3 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| MultiVolt I/O Interface | — | 1.5V / 1.8V / 2.5V / 3.3V |
| In-System Programmability | — | IEEE Std. 1532 compliant |
| Boundary-Scan Test | — | IEEE Std. 1149.1 (JTAG) |
| Configuration Memory | — | EEPROM (non-volatile, instant-on) |
| Lead-Free | — | Yes |