EPM3512ATC144 vs EPM3128ATC144-10 对比

详细并排对比 EPM3512ATC144 出自 Altera 和 EPM3128ATC144-10 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM3512ATC144 EPM3128ATC144-10
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 有效
库存状态 有库存 有库存
单价(USD) $8.75 $6.20
Family MAX 3000A MAX 3000A
Macrocells 512 —
Logic Array Blocks (LABs) 16 —
Maximum User I/O Pins 212 —
封装 TQFP-144 (20x20 mm) 144-pin TQFP (TQ144)
Core Supply Voltage 3.3 V —
Programming Technology EEPROM (in-system programmable) —
JTAG Interface IEEE Std. 1149.1 (4-pin) —
Maximum Frequency 116 MHz —
Propagation Delay (tPD) [DATA_NEEDED: tPD in ns] 10 ns (speed grade -10)
Product Terms per Macrocell 32 (expandable) —
I/O Standards LVTTL, LVCMOS, 2.5 V/3.3 V/5 V tolerant —
工作温度 0C to +70C (commercial) 0C to +70C (commercial)
安装类型 Surface Mount Surface Mount
MSL 等级 3 —
RoHS 状态 Compliant (lead-free suffix variants available) Compliant
Device Type — CPLD (Complex Programmable Logic Device)
Macro Cells — 128
User I/Os — 96
Usable Gates — 2,500 (typical)
Logic Elements / LABs — 4 Logic Array Blocks
Counter Frequency (fCNT) — Up to 227.3 MHz
Supply Voltage (VCCINT) — 3.3 V
MultiVolt I/O Interface — 1.5V / 1.8V / 2.5V / 3.3V
In-System Programmability — IEEE Std. 1532 compliant
Boundary-Scan Test — IEEE Std. 1149.1 (JTAG)
Configuration Memory — EEPROM (non-volatile, instant-on)
Lead-Free — Yes

数据手册与资源

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