EPM5032DC-15 vs EPM5032DI25 Comparación
Comparación detallada lado a lado de EPM5032DC-15 por Altera y EPM5032DI25 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EPM5032DC-15 - 600-Gate, 32-Macrocell UV PLD | Altera MAX 5000 | DIP-28
EPM5032DC-15 Obsolete
Comparación de especificaciones
| Parámetro | EPM5032DC-15 | EPM5032DI25 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,95 | $11,10 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | UV-erasable EPLD (PAL-type CMOS) | UV-erasable EPLD (CMOS EPROM-based) |
| Usable Gates | 600 | — |
| Macrocells | 32 | 32 |
| Propagation Delay (tPD) | 15 ns | — |
| Maximum Toggle Frequency (fMAX) | 83.3 MHz | — |
| Supply Voltage (VCC) | 5 V (nominal) | 5 V (single supply) |
| Logic Family | CMOS, TTL-compatible I/O | — |
| Programmable Pins | 16 bidirectional I/O + 4 dedicated input = 20 | — |
| Total Package Pins | 28 | — |
| Encapsulado | CERDIP-28 (windowed, through-hole) | 24-pin Ceramic DIP (DI) with quartz window |
| Tipo de montaje | Through-Hole (DIP) | — |
| Temperatura de funcionamiento | 0C to +70C (commercial) | — |
| Erasure Method | UV light through ceramic quartz window | — |
| Process Technology | CMOS | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | — |
| Lead-Free | unknown | — |
| Logic Array Blocks (LABs) | — | 2 |
| Product Terms | — | 320 |
| Output Macrocells | — | 16 |
| Bidirectional I/O Pins | — | 16 |
| Dedicated Inputs | — | 7 |
| Total Inputs | — | 24 |
| Pin-to-Pin Delay (tPD) | — | 25 ns |
| Maximum Clock Frequency (fMAX) | — | 62.5 MHz |
| I/O Standard | — | TTL-compatible |
| Programming Technology | — | UV-EPROM (erasable via quartz window) |