EPM5032DC-15 vs EPM5032DI25 Comparaison
Comparaison détaillée côte à côte de EPM5032DC-15 par Altera et EPM5032DI25 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EPM5032DC-15 - 600-Gate, 32-Macrocell UV PLD | Altera MAX 5000 | DIP-28
EPM5032DC-15 Obsolete
Comparaison des spécifications
| Paramètre | EPM5032DC-15 | EPM5032DI25 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,95 | $11,10 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | UV-erasable EPLD (PAL-type CMOS) | UV-erasable EPLD (CMOS EPROM-based) |
| Usable Gates | 600 | — |
| Macrocells | 32 | 32 |
| Propagation Delay (tPD) | 15 ns | — |
| Maximum Toggle Frequency (fMAX) | 83.3 MHz | — |
| Supply Voltage (VCC) | 5 V (nominal) | 5 V (single supply) |
| Logic Family | CMOS, TTL-compatible I/O | — |
| Programmable Pins | 16 bidirectional I/O + 4 dedicated input = 20 | — |
| Total Package Pins | 28 | — |
| Boîtier | CERDIP-28 (windowed, through-hole) | 24-pin Ceramic DIP (DI) with quartz window |
| Type de montage | Through-Hole (DIP) | — |
| Température de fonctionnement | 0C to +70C (commercial) | — |
| Erasure Method | UV light through ceramic quartz window | — |
| Process Technology | CMOS | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | — |
| Lead-Free | unknown | — |
| Logic Array Blocks (LABs) | — | 2 |
| Product Terms | — | 320 |
| Output Macrocells | — | 16 |
| Bidirectional I/O Pins | — | 16 |
| Dedicated Inputs | — | 7 |
| Total Inputs | — | 24 |
| Pin-to-Pin Delay (tPD) | — | 25 ns |
| Maximum Clock Frequency (fMAX) | — | 62.5 MHz |
| I/O Standard | — | TTL-compatible |
| Programming Technology | — | UV-EPROM (erasable via quartz window) |