EPM5032DC vs EPM5032DC-15 Comparación
Comparación detallada lado a lado de EPM5032DC por Altera y EPM5032DC-15 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EPM5032DC-15 - 600-Gate, 32-Macrocell UV PLD | Altera MAX 5000 | DIP-28
EPM5032DC-15 ObsoleteComparación de especificaciones
| Parámetro | EPM5032DC | EPM5032DC-15 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $10,40 | $9,95 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable Programmable Logic Device) | UV-erasable EPLD (PAL-type CMOS) |
| Macrocells | 32 | 32 |
| Logic Array Blocks (LABs) | 1 | — |
| Encapsulado | DIP-24 (ceramic, windowed) | CERDIP-28 (windowed, through-hole) |
| Speed Grade | DC (commercial) | — |
| Temperatura de funcionamiento | 0C to +70C | 0C to +70C (commercial) |
| Technology | Bipolar EPROM, UV-erasable | — |
| Programmable Logic Elements | AND array + fixed OR array per macrocell | — |
| Configuration Memory | EPROM (UV-erasable via package window) | — |
| Tipo de montaje | Through-hole (DIP) | Through-Hole (DIP) |
| Recuento de pines | 24 | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Programming Tool | Altera MAX+PLUS II / A+PLUS legacy | — |
| Estado del ciclo de vida | Obsolete (mature legacy) | — |
| Usable Gates | — | 600 |
| Propagation Delay (tPD) | — | 15 ns |
| Maximum Toggle Frequency (fMAX) | — | 83.3 MHz |
| Supply Voltage (VCC) | — | 5 V (nominal) |
| Logic Family | — | CMOS, TTL-compatible I/O |
| Programmable Pins | — | 16 bidirectional I/O + 4 dedicated input = 20 |
| Total Package Pins | — | 28 |
| Erasure Method | — | UV light through ceramic quartz window |
| Process Technology | — | CMOS |
| Lead-Free | — | unknown |