EPM5032DC vs EPM5032DC-15 比較
詳細な並列比較: EPM5032DC メーカー: Altera および EPM5032DC-15 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM5032DC-15 - 600-Gate, 32-Macrocell UV PLD | Altera MAX 5000 | DIP-28
EPM5032DC-15 Obsolete仕様比較
| パラメータ | EPM5032DC | EPM5032DC-15 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $10.40 | $9.95 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable Programmable Logic Device) | UV-erasable EPLD (PAL-type CMOS) |
| Macrocells | 32 | 32 |
| Logic Array Blocks (LABs) | 1 | — |
| パッケージ | DIP-24 (ceramic, windowed) | CERDIP-28 (windowed, through-hole) |
| Speed Grade | DC (commercial) | — |
| 動作温度 | 0C to +70C | 0C to +70C (commercial) |
| Technology | Bipolar EPROM, UV-erasable | — |
| Programmable Logic Elements | AND array + fixed OR array per macrocell | — |
| Configuration Memory | EPROM (UV-erasable via package window) | — |
| 実装タイプ | Through-hole (DIP) | Through-Hole (DIP) |
| ピン数 | 24 | — |
| RoHS ステータス | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Programming Tool | Altera MAX+PLUS II / A+PLUS legacy | — |
| ライフサイクル状態 | Obsolete (mature legacy) | — |
| Usable Gates | — | 600 |
| Propagation Delay (tPD) | — | 15 ns |
| Maximum Toggle Frequency (fMAX) | — | 83.3 MHz |
| Supply Voltage (VCC) | — | 5 V (nominal) |
| Logic Family | — | CMOS, TTL-compatible I/O |
| Programmable Pins | — | 16 bidirectional I/O + 4 dedicated input = 20 |
| Total Package Pins | — | 28 |
| Erasure Method | — | UV light through ceramic quartz window |
| Process Technology | — | CMOS |
| Lead-Free | — | unknown |