EPM5130QC-1 vs EPM5130WM883B-2 Comparación
Comparación detallada lado a lado de EPM5130QC-1 por Altera y EPM5130WM883B-2 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5130QC-1 | EPM5130WM883B-2 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,95 | $52,00 |
| Family | MAX 5000 | MAX 5000 |
| Product Type | UV-Erasable / OTP Complex PLD (CPLD) | — |
| Logic Cells / Macrocells | 128 macrocells | — |
| Usable Gates (marketing) | 5130 gates | — |
| Speed Grade | -1 | — |
| Encapsulado | PQFP-100 (windowed ceramic) | [DATA_NEEDED: exact package code] |
| Terminal Pitch | 0.635 mm | — |
| Process Technology | CMOS | CMOS |
| Configuration Memory | UV-Erasable EPROM | — |
| Tensión de alimentación | 5 V (single) | — |
| Temperatura de funcionamiento | Commercial (0 C to +70 C) | [DATA_NEEDED: military temperature range] |
| Programmable Polarity | Yes (per macrocell) | — |
| Boundary Scan / JTAG | Per MAX 5000 family | — |
| Tipo de montaje | Surface Mount | — |
| Estado RoHS | [DATA_NEEDED: rohs status] | unknown |
| Device Type | — | UV PLD (UV-erasable programmable logic device) |
| Macrocells | — | 128 |
| Logic Array Blocks (LABs) | — | 8 |
| Propagation Delay (tPD, -2 grade) | — | 45 ns |
| Propagation Delay (tPD, -1 grade) | — | 55 ns (EPM5130WM883B base) |
| Dedicated Inputs | — | 19 |
| User I/O Pins | — | 48 |
| Total Inputs | — | 68 |
| Total Outputs | — | 48 |
| Interconnect | — | Programmable Interconnect Array (PIA) - 8 LAB channels |
| External Clock Inputs | — | 1 |
| Programming Method | — | UV-erasable (windowed package) |
| Development Tool | — | MAX+PLUS II |
| Military Processing | — | MIL-STD-883 Class B (883B suffix) |