EPM5130QC-1 vs EPM5130WM883B-2 Comparaison
Comparaison détaillée côte à côte de EPM5130QC-1 par Altera et EPM5130WM883B-2 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5130QC-1 | EPM5130WM883B-2 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,95 | $52,00 |
| Family | MAX 5000 | MAX 5000 |
| Product Type | UV-Erasable / OTP Complex PLD (CPLD) | — |
| Logic Cells / Macrocells | 128 macrocells | — |
| Usable Gates (marketing) | 5130 gates | — |
| Speed Grade | -1 | — |
| Boîtier | PQFP-100 (windowed ceramic) | [DATA_NEEDED: exact package code] |
| Terminal Pitch | 0.635 mm | — |
| Process Technology | CMOS | CMOS |
| Configuration Memory | UV-Erasable EPROM | — |
| Tension d'alimentation | 5 V (single) | — |
| Température de fonctionnement | Commercial (0 C to +70 C) | [DATA_NEEDED: military temperature range] |
| Programmable Polarity | Yes (per macrocell) | — |
| Boundary Scan / JTAG | Per MAX 5000 family | — |
| Type de montage | Surface Mount | — |
| Statut RoHS | [DATA_NEEDED: rohs status] | unknown |
| Device Type | — | UV PLD (UV-erasable programmable logic device) |
| Macrocells | — | 128 |
| Logic Array Blocks (LABs) | — | 8 |
| Propagation Delay (tPD, -2 grade) | — | 45 ns |
| Propagation Delay (tPD, -1 grade) | — | 55 ns (EPM5130WM883B base) |
| Dedicated Inputs | — | 19 |
| User I/O Pins | — | 48 |
| Total Inputs | — | 68 |
| Total Outputs | — | 48 |
| Interconnect | — | Programmable Interconnect Array (PIA) - 8 LAB channels |
| External Clock Inputs | — | 1 |
| Programming Method | — | UV-erasable (windowed package) |
| Development Tool | — | MAX+PLUS II |
| Military Processing | — | MIL-STD-883 Class B (883B suffix) |