EPM5192AGC84-15 vs EPM5192GC84-1 Comparación
Comparación detallada lado a lado de EPM5192AGC84-15 por Altera y EPM5192GC84-1 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5192AGC84-15 | EPM5192GC84-1 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $42,00 | $14,20 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | UV-Erasable/OTP Complex PLD | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | — |
| User I/O Pins | 64 | 64 |
| Dedicated Inputs | 7 | 7 |
| Propagation Delay (tPD) | 15 ns | 40 ns (speed grade -1) |
| Maximum Internal Clock Frequency | 83.3 MHz | — |
| Supply Voltage (VCC) | 4.5 V to 5.5 V | 4.75 V to 5.25 V |
| Process Technology | CMOS | — |
| Programmable Element | UV-Erasable EPROM cell | — |
| Encapsulado | 84-pin Ceramic PGA (Pin Grid Array) | 84-pin PGA (Pin Grid Array), WPGA code |
| Tipo de montaje | Through-Hole | Through-hole (PGA socket) |
| Temperatura de funcionamiento | Commercial (0C to +70C) - [DATA_NEEDED: military/industrial temp grade range] | — |
| Estado RoHS | [DATA_NEEDED: not declared in web data; ceramic PGA with UV window typically non-RoHS] | Compliant (per third-party distributor listing) |
| Product Type | — | UV-Erasable/OTP Complex PLD (CPLD) |
| Technology | — | CMOS (EPROM-cell based) |
| Frecuencia de reloj máxima | — | 50 MHz |
| Total Inputs / Outputs | — | 72 inputs / 64 outputs |
| Architecture | — | Shared input/clock and shared product terms |
| Temperature Grade | — | Commercial |
| Programming Method | — | UV erasure (quartz window) + EPROM programmer |
| Logic Element Type | — | Macrocells with AND/OR array |