EPM5192AGC84-15 vs EPM5192GC84-1 Comparaison
Comparaison détaillée côte à côte de EPM5192AGC84-15 par Altera et EPM5192GC84-1 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5192AGC84-15 | EPM5192GC84-1 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $42,00 | $14,20 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | UV-Erasable/OTP Complex PLD | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | — |
| User I/O Pins | 64 | 64 |
| Dedicated Inputs | 7 | 7 |
| Propagation Delay (tPD) | 15 ns | 40 ns (speed grade -1) |
| Maximum Internal Clock Frequency | 83.3 MHz | — |
| Supply Voltage (VCC) | 4.5 V to 5.5 V | 4.75 V to 5.25 V |
| Process Technology | CMOS | — |
| Programmable Element | UV-Erasable EPROM cell | — |
| Boîtier | 84-pin Ceramic PGA (Pin Grid Array) | 84-pin PGA (Pin Grid Array), WPGA code |
| Type de montage | Through-Hole | Through-hole (PGA socket) |
| Température de fonctionnement | Commercial (0C to +70C) - [DATA_NEEDED: military/industrial temp grade range] | — |
| Statut RoHS | [DATA_NEEDED: not declared in web data; ceramic PGA with UV window typically non-RoHS] | Compliant (per third-party distributor listing) |
| Product Type | — | UV-Erasable/OTP Complex PLD (CPLD) |
| Technology | — | CMOS (EPROM-cell based) |
| Fréquence d'horloge maximale | — | 50 MHz |
| Total Inputs / Outputs | — | 72 inputs / 64 outputs |
| Architecture | — | Shared input/clock and shared product terms |
| Temperature Grade | — | Commercial |
| Programming Method | — | UV erasure (quartz window) + EPROM programmer |
| Logic Element Type | — | Macrocells with AND/OR array |