EPM5192AJC84-20 vs EPM5192ALI84-20 Comparación
Comparación detallada lado a lado de EPM5192AJC84-20 por Altera y EPM5192ALI84-20 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EPM5192AJC84-20 - 192-Macrocell UV PLD, 33ns, 84-Pin J-Lead | Altera
EPM5192AJC84-20 ObsoleteAltera
EPM5192ALI84-20 - 192-Macrocell MAX 5000 PLD, 84-Pin J-Lead | Altera
EPM5192ALI84-20 ObsoleteComparación de especificaciones
| Parámetro | EPM5192AJC84-20 | EPM5192ALI84-20 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $19,20 | $9,90 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | UV-erasable/OTP Complex PLD (CPLD) | EPLD (UV-erasable / OTP Complex PLD) |
| Macrocells | 192 | 192 |
| Propagation Delay (tpd) | 33 ns (speed grade -20) | — |
| Frecuencia de reloj máxima | 66.7 MHz | — |
| Supply Voltage (Vcc) | 4.75 V to 5.25 V | — |
| Dedicated Inputs | 7 | — |
| User I/O Lines | 64 | — |
| Process Technology | CMOS, UV-erasable EEPROM | CMOS, EPROM-based |
| Encapsulado | 84-pin PLCC J-Lead (WQCCJ, J84) | — |
| Operating Temperature Grade | Commercial | Industrial (I) |
| Tipo de montaje | Surface Mount (J-Lead) | Surface Mount (PLCC socket compatible) |
| Nivel MSL | [DATA_NEEDED: MSL level] | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - Altera MAX 5000 series is generally legacy and may not be RoHS compliant] |
| Programming Tool | Altera MAX+PLUS II / Quartus (legacy) | — |
| Lead-Free / Halogen-Free | [DATA_NEEDED: lead-free status] | — |
| Propagation Delay (tPD) | — | 20 ns (pin-compatible speed grade) |
| User I/O Pins (max) | — | 84 (in PLCC-84 package) |
| Tensión de alimentación | — | 5 V (single supply, TTL-compatible I/O) |
| Package Code | — | QCCJ (Plastic Leaded Chip Carrier, J-bend) |
| Package Type | — | PLCC-84 (PQCC-84) |
| No. of Terminals | — | 84 |
| Form of Terminal | — | J-BEND |
| Programmability | — | UV-erasable / one-time programmable (OTP) |
| Logic Type | — | Combinatorial and registered, per-macrocell DFF |
| I/O Standard | — | TTL-compatible |