EPM5192GC1 vs EPM5192GC-2 Comparación
Comparación detallada lado a lado de EPM5192GC1 por Altera y EPM5192GC-2 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5192GC1 | EPM5192GC-2 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $24,50 | $92,00 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 192 | — |
| Usable Gates | 3,750 | — |
| Maximum Operating Frequency | 62.5 MHz | — |
| Supply Voltage (VCC) | 5 V | 5 V nominal |
| Programming Technology | UV-Erasable / OTP EPROM | — |
| Package Type | Ceramic PGA (Pin Grid Array) | Pin Grid Array (PGA), ceramic |
| Logic Elements | 192 macrocells with AND/OR array | — |
| Process Technology | EPROM-based CMOS | — |
| Temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | Commercial (0C to +70C) |
| Propagation Delay | [DATA_NEEDED: tpd specification] | — |
| Número de pines | [DATA_NEEDED: pin count for GC1 PGA package] | — |
| Tipo de montaje | Through-hole (PGA) | Through-hole (PGA socket) |
| Estado RoHS | unknown | Non-Compliant (ceramic PGA, lead-bearing per GlobalSpec listing) |
| Development Tool | Altera MAX+PLUS II | — |
| Macrocells | — | 192 |
| Logic Array Blocks | — | 16 (LABs of 16 macrocells each) |
| Usable I/O Pins | — | [DATA_NEEDED: exact user I/O count for PGA package] |
| Propagation Delay (tPD) | — | 12 ns typical (-2 grade) |
| Counter Frequency | — | 100 MHz minimum |
| Technology | — | CMOS EPROM |
| Programmable Technology | — | UV-erasable / one-time programmable |
| Programming Toolchain | — | Altera MAX+PLUS II |
| Speed Grade | — | -2 |