EPM5192GC1 vs EPM5192GC-2 Comparaison
Comparaison détaillée côte à côte de EPM5192GC1 par Altera et EPM5192GC-2 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EPM5192GC1 | EPM5192GC-2 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $24,50 | $92,00 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 192 | — |
| Usable Gates | 3,750 | — |
| Maximum Operating Frequency | 62.5 MHz | — |
| Supply Voltage (VCC) | 5 V | 5 V nominal |
| Programming Technology | UV-Erasable / OTP EPROM | — |
| Package Type | Ceramic PGA (Pin Grid Array) | Pin Grid Array (PGA), ceramic |
| Logic Elements | 192 macrocells with AND/OR array | — |
| Process Technology | EPROM-based CMOS | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | Commercial (0C to +70C) |
| Propagation Delay | [DATA_NEEDED: tpd specification] | — |
| Nombre de broches | [DATA_NEEDED: pin count for GC1 PGA package] | — |
| Type de montage | Through-hole (PGA) | Through-hole (PGA socket) |
| Statut RoHS | unknown | Non-Compliant (ceramic PGA, lead-bearing per GlobalSpec listing) |
| Development Tool | Altera MAX+PLUS II | — |
| Macrocells | — | 192 |
| Logic Array Blocks | — | 16 (LABs of 16 macrocells each) |
| Usable I/O Pins | — | [DATA_NEEDED: exact user I/O count for PGA package] |
| Propagation Delay (tPD) | — | 12 ns typical (-2 grade) |
| Counter Frequency | — | 100 MHz minimum |
| Technology | — | CMOS EPROM |
| Programmable Technology | — | UV-erasable / one-time programmable |
| Programming Toolchain | — | Altera MAX+PLUS II |
| Speed Grade | — | -2 |