EPM5192JC vs EPM5192JC-2 Comparación
Comparación detallada lado a lado de EPM5192JC por Intel y EPM5192JC-2 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5192JC | EPM5192JC-2 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $16,40 | $22,50 |
| Product Type | CPLD (Complex Programmable Logic Device) | UV-erasable Programmable Logic Device (PLD) |
| Series | EPM5192 (Classic / MAX-class) | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | 12 |
| Interconnect Architecture | Programmable Interconnect Array (PIA) | — |
| Process Technology | CMOS EPROM (UV-erasable) | CMOS |
| Encapsulado | 68-pin PLCC (JC) windowed ceramic | 84-pin CQCC (Ceramic Quad Flat Pack, J-lead, windowed) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Programming Method | UV-erase + EPROM programmer | UV-erase / EPROM |
| Non-Volatile Configuration | Yes (EPROM cell array) | — |
| Logic Family | Classic CPLD (EPM5xxx series) | — |
| Temperatura de funcionamiento | [DATA_NEEDED: commercial / industrial / military grade] | — |
| Tensión de alimentación | [DATA_NEEDED: VCC nominal] | — |
| Propagation Delay | [DATA_NEEDED: tpd spec by speed grade] | — |
| Estado RoHS | [DATA_NEEDED: original Altera marking not RoHS] | [DATA_NEEDED: RoHS compliance] |
| Device Family | — | MAX 5000 |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| User I/O Pins | — | 64 |
| Dedicated Inputs | — | 7 |
| External Clock Inputs | — | 1 |
| Propagation Delay (tPD) | — | 45 ns |
| Frecuencia de reloj máxima | — | 40 MHz |
| Number of Terminals | — | 84 |
| Rango de temperatura de funcionamiento | — | [DATA_NEEDED: operating temperature range] |