EPM5192JC vs EPM5192JC-2 비교
다음의 상세 나란히 비교: EPM5192JC 제조: Intel 및 EPM5192JC-2 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM5192JC | EPM5192JC-2 |
|---|---|---|
| 브랜드 | Intel | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $16.40 | $22.50 |
| Product Type | CPLD (Complex Programmable Logic Device) | UV-erasable Programmable Logic Device (PLD) |
| Series | EPM5192 (Classic / MAX-class) | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | 12 |
| Interconnect Architecture | Programmable Interconnect Array (PIA) | — |
| Process Technology | CMOS EPROM (UV-erasable) | CMOS |
| 패키지 | 68-pin PLCC (JC) windowed ceramic | 84-pin CQCC (Ceramic Quad Flat Pack, J-lead, windowed) |
| 실장 유형 | Surface Mount | Surface Mount |
| Programming Method | UV-erase + EPROM programmer | UV-erase / EPROM |
| Non-Volatile Configuration | Yes (EPROM cell array) | — |
| Logic Family | Classic CPLD (EPM5xxx series) | — |
| 동작 온도 | [DATA_NEEDED: commercial / industrial / military grade] | — |
| 공급 전압 | [DATA_NEEDED: VCC nominal] | — |
| Propagation Delay | [DATA_NEEDED: tpd spec by speed grade] | — |
| RoHS 상태 | [DATA_NEEDED: original Altera marking not RoHS] | [DATA_NEEDED: RoHS compliance] |
| Device Family | — | MAX 5000 |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| User I/O Pins | — | 64 |
| Dedicated Inputs | — | 7 |
| External Clock Inputs | — | 1 |
| Propagation Delay (tPD) | — | 45 ns |
| 최대 클록 주파수 | — | 40 MHz |
| Number of Terminals | — | 84 |
| 동작 온도 범위 | — | [DATA_NEEDED: operating temperature range] |