EPM5192QC-1 vs EPM5192AQC-2 Comparación
Comparación detallada lado a lado de EPM5192QC-1 por Altera y EPM5192AQC-2 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM5192QC-1 | EPM5192AQC-2 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,95 | $21,50 |
| Family | MAX 5000 | — |
| Device Type | OTP PLD (One-Time-Programmable) | UV-Erasable / OTP Complex PLD (CPLD) |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | — |
| User I/O Pins | 64 | 64 |
| Dedicated Inputs | 7 | 7 |
| Propagation Delay (tPD) | 40 ns | 45 ns (-2 speed grade) |
| Maximum Clock Frequency (fMAX) | 50 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Process Technology | CMOS | CMOS |
| Encapsulado | PQFP-100 (R-PQFP-G100) | 100-pin PQFP (R-PQFP-G100) |
| Lead Pitch | 0.650 mm | 0.635 mm |
| Terminal Form | Gull-wing | Gull-wing |
| Tipo de montaje | Surface Mount | Surface Mount |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| External Clock Pins | 1 (shared clock) | — |
| Configuration Memory | EPROM (OTP, windowless) | — |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: confirmed compliance status] |
| Series | — | MAX 5000 (EPM5192) |
| Total Inputs | — | 72 |
| Frecuencia de reloj máxima | — | [DATA_NEEDED: max fMAX for -2 grade] |
| Switch Matrix | — | UV-Erasable / OTP (windowless on AQC package) |
| Temperatura de funcionamiento | — | [DATA_NEEDED: commercial / industrial / military grade] |
| Programming Interface | — | JTAG (IEEE 1149.1) boundary scan |