EPM5192QC-1 vs EPM5192AQC-2 比較
詳細な並列比較: EPM5192QC-1 メーカー: Altera および EPM5192AQC-2 メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM5192QC-1 | EPM5192AQC-2 |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $9.95 | $21.50 |
| Family | MAX 5000 | — |
| Device Type | OTP PLD (One-Time-Programmable) | UV-Erasable / OTP Complex PLD (CPLD) |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | — |
| User I/O Pins | 64 | 64 |
| Dedicated Inputs | 7 | 7 |
| Propagation Delay (tPD) | 40 ns | 45 ns (-2 speed grade) |
| Maximum Clock Frequency (fMAX) | 50 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Process Technology | CMOS | CMOS |
| パッケージ | PQFP-100 (R-PQFP-G100) | 100-pin PQFP (R-PQFP-G100) |
| Lead Pitch | 0.650 mm | 0.635 mm |
| Terminal Form | Gull-wing | Gull-wing |
| 実装タイプ | Surface Mount | Surface Mount |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| External Clock Pins | 1 (shared clock) | — |
| Configuration Memory | EPROM (OTP, windowless) | — |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: confirmed compliance status] |
| Series | — | MAX 5000 (EPM5192) |
| Total Inputs | — | 72 |
| 最大クロック周波数 | — | [DATA_NEEDED: max fMAX for -2 grade] |
| Switch Matrix | — | UV-Erasable / OTP (windowless on AQC package) |
| 動作温度 | — | [DATA_NEEDED: commercial / industrial / military grade] |
| Programming Interface | — | JTAG (IEEE 1149.1) boundary scan |