EPM570F256C5N vs EPM2210F256C3N Comparación
Comparación detallada lado a lado de EPM570F256C5N por Altera y EPM2210F256C3N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM570F256C5N | EPM2210F256C3N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $17,03 | $47,10 |
| Family | MAX II | — |
| Logic Elements | 570 | — |
| Number of Macrocells | 440 | — |
| Internal Supply Voltage | 2.5 V / 3.3 V | 2.5 V / 3.3 V (on-chip regulator allows single 3.3 V rail) |
| User I/O Count | 160 | — |
| Pin-to-Pin Delay (tPD) | 5.4 ns | — |
| Maximum Operating Frequency | 304 MHz | — |
| Process Technology | 0.18 um | 0.18 um flash CMOS |
| User Flash Memory | 8 Kbits | 8 Kbits |
| Program Memory Type | Non-volatile Flash | — |
| MultiVolt I/O Support | 1.5V / 1.8V / 2.5V / 3.3V | — |
| Programming Interface | JTAG (IEEE 1149.1), in-system | — |
| Encapsulado | 256-FBGA (FineLine BGA) | 256-ball FineLine BGA (FBGA), 17 x 17 mm, 1.0 mm pitch |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | 0C to 85C (TJ) | — |
| Series | — | MAX II |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Programmable Type | — | In System Programmable (JTAG, IEEE 1149.1) |
| Macrocells | — | 1700 |
| Logic Elements / Blocks | — | 2210 |
| Number of User I/Os | — | 204 |
| Maximum Propagation Delay (tPD) | — | 7 ns |
| Maximum Internal Frequency (fMAX) | — | 304 MHz |
| I/O Standard Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V LVCMOS (MultiVolt) |
| Configuration Memory | — | On-chip flash (non-volatile, instant-on) |
| Temperatura de unión de funcionamiento | — | 0 C to 85 C (commercial, TJ suffix 'C') |
| Estado RoHS | — | Compliant (per DigiKey product page) |
| Nivel MSL | — | 3 (per JEDEC J-STD-020, typical for FBGA) |