EPM570F256I5N vs EPM570F256I5 Comparación
Comparación detallada lado a lado de EPM570F256I5N por Intel y EPM570F256I5 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM570F256I5N | EPM570F256I5 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $19,85 | $12,60 |
| Family | MAX II | MAX II |
| Logic Elements | 570 | — |
| Macrocells | 440 | — |
| User I/O Count | 160 | — |
| User Flash Memory | 8 kbits (9220 bits) | — |
| Pin-to-Pin Delay (tPD1) | 5.4 ns | — |
| Maximum Internal Frequency | 304 MHz | [DATA_NEEDED: fMAX MHz per speed grade] |
| Global Clock Networks | 4 | — |
| Global Clear/Reset Signals | 2 | — |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multiVolt) | — |
| Encapsulado | 256-ball FineLine BGA (17 mm x 17 mm) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | -40C to +100C (TJ, industrial) | -40C to +85C (industrial) |
| Programming Interface | JTAG (IEEE 1149.1) / ISP (IEEE 1532) | JTAG (IEEE 1149.1) / ISP |
| Configuration Memory | Internal Flash (non-volatile, instant-on) | — |
| Estado RoHS | Compliant (N suffix = Pb-free) | [DATA_NEEDED: RoHS status] |
| Logic Elements (LE) | — | 570 |
| Maximum User I/O Pins | — | 160 |
| User Flash Memory (UFM) | — | 8 Kbits |
| Number of LABs/CLBs | — | [DATA_NEEDED: number of LABs] |
| Package Type | — | 256-ball FineLine BGA (FBGA-256) |
| Supply Voltage - Core | — | 3.3 V (also operates at 3.3V per part description) |
| I/O Standards Supported | — | LVTTL, LVCMOS, SSTL, PCI |
| MultiVolt I/O | — | 1.5V / 1.8V / 2.5V / 3.3V |
| In-System Programmability | — | Yes |
| Non-volatile Configuration | — | Yes (on-chip flash) |
| Pin-to-Pin Logic Delay (typ) | — | 5 ns to 7 ns |
| Number of PLLs | — | [DATA_NEEDED: number of PLLs] |
| Width | — | 17 mm (per Partstack) |
| Speed Grade | — | I5 |