EPM570T100A5N vs EPM570T144A5N Comparación
Comparación detallada lado a lado de EPM570T100A5N por Altera y EPM570T144A5N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM570T100A5N | EPM570T144A5N |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $6,72 | $22,80 |
| Device Family | MAX II | — |
| Logic Elements | 570 | — |
| Macrocells | 440 | — |
| User I/O Pins | 76 | 144 |
| Number of Logic Array Blocks (LABs) | 57 | — |
| Encapsulado | 100-pin TQFP | 144-pin TQFP (T144) |
| Pin-to-Pin Logic Delay (tPD) | 5.4 ns | — |
| Maximum Internal Frequency | 304 MHz | — |
| Core Supply Voltage (VCCINT) | 1.8 V (typical) | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multi-voltage) |
| User Flash Memory (UFM) | 8 Kbits | 8 Kbits |
| Configuration Memory | On-chip non-volatile flash | Internal Flash (non-volatile, instant-on) |
| Programming Interface | JTAG (IEEE 1149.1) - ISP | JTAG (IEEE 1149.1) / In-System Programmable |
| Temperatura de funcionamiento | -40 °C to +125 °C (industrial) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | Compliant | Compliant |
| Family | — | MAX II |
| Device | — | EPM570 |
| Logic Elements (LE) | — | 570 |
| Macro Cells | — | 440 |
| Maximum Operating Frequency | — | 201.1 MHz |
| Propagation Delay (tPD) | — | 5.4 ns |
| Process Technology | — | 0.18 µm |
| Core Voltage | — | 1.8 V |
| Operating Temperature Grade | — | Automotive (-40 °C to +125 °C) |