EPM570T100A5N vs EPM570T144A5N 比較
詳細な並列比較: EPM570T100A5N メーカー: Altera および EPM570T144A5N メーカー: Altera。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM570T100A5N | EPM570T144A5N |
|---|---|---|
| ブランド | Altera | Altera |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | 有効 | 有効 |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $6.72 | $22.80 |
| Device Family | MAX II | — |
| Logic Elements | 570 | — |
| Macrocells | 440 | — |
| User I/O Pins | 76 | 144 |
| Number of Logic Array Blocks (LABs) | 57 | — |
| パッケージ | 100-pin TQFP | 144-pin TQFP (T144) |
| Pin-to-Pin Logic Delay (tPD) | 5.4 ns | — |
| Maximum Internal Frequency | 304 MHz | — |
| Core Supply Voltage (VCCINT) | 1.8 V (typical) | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multi-voltage) |
| User Flash Memory (UFM) | 8 Kbits | 8 Kbits |
| Configuration Memory | On-chip non-volatile flash | Internal Flash (non-volatile, instant-on) |
| Programming Interface | JTAG (IEEE 1149.1) - ISP | JTAG (IEEE 1149.1) / In-System Programmable |
| 動作温度 | -40 °C to +125 °C (industrial) | — |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | Compliant | Compliant |
| Family | — | MAX II |
| Device | — | EPM570 |
| Logic Elements (LE) | — | 570 |
| Macro Cells | — | 440 |
| Maximum Operating Frequency | — | 201.1 MHz |
| Propagation Delay (tPD) | — | 5.4 ns |
| Process Technology | — | 0.18 µm |
| Core Voltage | — | 1.8 V |
| Operating Temperature Grade | — | Automotive (-40 °C to +125 °C) |