EPM570ZF256C7N vs EPM570ZM256C7N Comparación
Comparación detallada lado a lado de EPM570ZF256C7N por Intel y EPM570ZM256C7N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM570ZF256C7N | EPM570ZM256C7N |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | Activo |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $17,85 | $9,95 |
| Series | MAX II | MAX II Z |
| Programmable Type | In System Programmable | — |
| Macro Cells | 440 | 440 |
| Logic Elements (LE) | 440 | 570 |
| Embedded Flash Memory | 8 Kbit | — |
| Pin-to-Pin Logic Delay (tPD) | 9 ns | — |
| Maximum Operating Frequency | 201 MHz (internal) | 123.5 MHz |
| Maximum User I/O Pins | 160 | — |
| Supply Voltage - Internal (VCCINT) | 1.71 V to 1.89 V | — |
| I/O Bank Voltages | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Supplier Device Package | 256-MBGA (11x11 mm) | — |
| Package Type Code | 256-FBGA / 256-TFBGA | — |
| Ball Pitch | 1.0 mm | — |
| Process Technology | 0.18 µm flash-based CMOS | 0.18 µm CMOS |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| Rango de temperatura de funcionamiento | 0 °C to +85 °C (commercial, suffix 'C') | — |
| Tipo de montaje | Surface Mount | — |
| Estado RoHS | Compliant | — |
| Lead-Free Status | Lead free | — |
| Family | — | MAX II |
| User I/Os | — | 76 |
| User Flash Memory | — | 8 Kbits |
| Pin-to-Pin Delay (tPD) | — | 5.0 ns |
| Core Supply Voltage | — | 1.71 V to 1.89 V (3.3 V with on-chip regulator) |
| I/O Supply Voltages | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt) |
| Temperatura de funcionamiento | — | 0 °C to +85 °C (commercial) |
| Encapsulado | — | 256-ball MBGA (Micro FBGA), 0.5 mm pitch, 6 × 6 mm |
| Configuration Method | — | On-chip non-volatile (instant-on, ISP via JTAG) |
| JTAG Support | — | IEEE Std 1149.1 boundary-scan + ISP |
| Lead-Free / RoHS | — | Lead-free / RoHS compliant |
| Logic Family | — | CMOS |