EPM7128AETC100-5N vs EPM7128STC100-10N Comparación
Comparación detallada lado a lado de EPM7128AETC100-5N por Intel y EPM7128STC100-10N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPM7128AETC100-5N - 128-Macrocell MAX 7000A CPLD, 5ns | Intel / Altera
EPM7128AETC100-5N ✓ ActivoAltera
EPM7128STC100-10N - MAX 7000S CPLD 128-Macrocell 10ns TQFP-100 | Altera
EPM7128STC100-10N NrndComparación de especificaciones
| Parámetro | EPM7128AETC100-5N | EPM7128STC100-10N |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Activo | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $6,85 | $9,30 |
| Family | MAX 7000A | MAX 7000S |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Macrocells | 128 | 128 |
| User I/Os | 84 | 84 |
| Logic Gates (typical) | 2,500 | — |
| Pin-to-Pin Logic Delay (tPD) | 5 ns | — |
| Maximum Operating Frequency | 192.3 MHz | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Bank Supply Voltage (VCCIO) | 3.3 V or 2.5 V | — |
| 5V Tolerant Inputs | Yes (when VCCIO = 3.3 V) | — |
| Programmable Logic Type | EEPROM-based, in-system programmable | — |
| Programming Interface | JTAG (IEEE Std. 1149.1) | — |
| Encapsulado | 100-pin TQFP | 100-pin TQFP (14 x 14 x 1 mm) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Temperatura de funcionamiento | 0C to +70C (commercial) | 0 C to +70 C (commercial) |
| Estado RoHS | Compliant | Compliant (Pb-free "N" suffix) |
| Product Type | — | CPLD - Complex Programmable Logic Device |
| Usable Gates | — | 2,500 |
| Logic Array Blocks (LABs) | — | 8 (16 macrocells each) |
| Propagation Delay (tPD) | — | 10 ns |
| Internal Frequency (fMAX) | — | 100 MHz |
| Supply Voltage (VCCINT) | — | 5 V |
| I/O Voltage (VCCIO) | — | 3.3 V or 5 V (MultiVolt) |
| Process Technology | — | CMOS EEPROM |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Lead-Free | — | Yes |