EPM7128AETC100-5N vs EPM7128STC100-10N 对比
详细并排对比 EPM7128AETC100-5N 出自 Intel 和 EPM7128STC100-10N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPM7128AETC100-5N - 128-Macrocell MAX 7000A CPLD, 5ns | Intel / Altera
EPM7128AETC100-5N ✓ 量产中Altera
EPM7128STC100-10N - MAX 7000S CPLD 128-Macrocell 10ns TQFP-100 | Altera
EPM7128STC100-10N Nrnd规格对比
| 参数 | EPM7128AETC100-5N | EPM7128STC100-10N |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 有效 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $6.85 | $9.30 |
| Family | MAX 7000A | MAX 7000S |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Macrocells | 128 | 128 |
| User I/Os | 84 | 84 |
| Logic Gates (typical) | 2,500 | — |
| Pin-to-Pin Logic Delay (tPD) | 5 ns | — |
| Maximum Operating Frequency | 192.3 MHz | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Bank Supply Voltage (VCCIO) | 3.3 V or 2.5 V | — |
| 5V Tolerant Inputs | Yes (when VCCIO = 3.3 V) | — |
| Programmable Logic Type | EEPROM-based, in-system programmable | — |
| Programming Interface | JTAG (IEEE Std. 1149.1) | — |
| 封装 | 100-pin TQFP | 100-pin TQFP (14 x 14 x 1 mm) |
| 安装类型 | Surface Mount | Surface Mount |
| 工作温度 | 0C to +70C (commercial) | 0 C to +70 C (commercial) |
| RoHS 状态 | Compliant | Compliant (Pb-free "N" suffix) |
| Product Type | — | CPLD - Complex Programmable Logic Device |
| Usable Gates | — | 2,500 |
| Logic Array Blocks (LABs) | — | 8 (16 macrocells each) |
| Propagation Delay (tPD) | — | 10 ns |
| Internal Frequency (fMAX) | — | 100 MHz |
| Supply Voltage (VCCINT) | — | 5 V |
| I/O Voltage (VCCIO) | — | 3.3 V or 5 V (MultiVolt) |
| Process Technology | — | CMOS EEPROM |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| Lead-Free | — | Yes |