EPM7160ELC84-12 vs EPM7160SLC84-15 Comparación
Comparación detallada lado a lado de EPM7160ELC84-12 por Altera y EPM7160SLC84-15 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EPM7160ELC84-12 - MAX 7000 CPLD, 160 Macrocells, 12ns | Altera
EPM7160ELC84-12 ⚠ Última compra
Comparación de especificaciones
| Parámetro | EPM7160ELC84-12 | EPM7160SLC84-15 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $11,10 | $10,80 |
| Manufacturer | Altera (Intel PSG) | — |
| Series | MAX 7000 (MAX 7000E) | — |
| Programmable Type | EE PLD (EEPROM) | — |
| Number of Macrocells | 160 | — |
| Number of Logic Array Blocks (LABs) | 4 | — |
| Number of Usable Gates | 3,200 | — |
| Number of I/O (max) | 68 | — |
| Number of I/O (per package) | 64 | — |
| Propagation Delay tpd(1) max | 12 ns | — |
| Counter Frequency (max) | 90.9 MHz | — |
| Voltage Supply - Internal | 4.75 V to 5.25 V (5 V nominal) | — |
| Temperatura de funcionamiento | 0C to +70C (commercial) | 0 C to 70 C |
| Encapsulado / Carcasa | 84-LCC (J-Lead) | — |
| Supplier Device Package | 84-PLCC (29.31 x 29.31 mm) | — |
| Tipo de montaje | Surface Mount | Surface Mount (PLCC socket or direct solder) |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Estado RoHS | [DATA_NEEDED: RoHS status] | Not RoHS compliant (contains lead, SnPb finish typical) |
| Family | — | MAX 7000 |
| Macrocells | — | 160 |
| Usable Gates | — | 3,200 |
| Maximum Propagation Delay | — | 15 ns |
| Maximum User I/O Pins | — | 64 |
| Supply Voltage (VCCINT/VCIO) | — | 4.75 V to 5.25 V (5 V nominal) |
| I/O Logic Level | — | Configurable 3.3 V or 5 V |
| Technology | — | CMOS, EEPROM configuration |
| Package Type | — | PLCC-84 (PQCC84, JEDEC S-PQCC-J84) |
| Terminal Pitch | — | 1.270 mm |
| Programming Interface | — | JTAG (IEEE 1149.1) in-system programmable |
| Lifecycle | — | Obsolete / last-time-buy (per Altera/Intel PDN) |