EPM7192SQC160-15 vs EPM7192SQI160-10N Comparación
Comparación detallada lado a lado de EPM7192SQC160-15 por Altera y EPM7192SQI160-10N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM7192SQC160-15 | EPM7192SQI160-10N |
|---|---|---|
| Marca | Altera | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $8,75 | $35,90 |
| Family | MAX 7000S | MAX 7000 |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Number of Macrocells | 192 | — |
| Number of Logic Array Blocks | 4 | — |
| Number of Usable Gates | 3750 | — |
| User I/O Pins | 124 | — |
| Pin-to-Pin Logic Delay (tPD) | 15 ns | — |
| Maximum Operating Frequency | 76.9 MHz | — |
| Tensión de alimentación | 5.0 V | — |
| Programmability | In-System (ISP) via JTAG IEEE Std 1149.1 | — |
| Configuration Memory | EEPROM, non-volatile | — |
| Encapsulado | PQFP-160 | PQFP-160 (QFP-160, plastic) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Rango de temperatura de funcionamiento | [DATA_NEEDED: operating temperature range] | — |
| Process Technology | CMOS, EEPROM-based | — |
| Series | — | MAX 7000S |
| Architecture | — | Second-generation MAX (CMOS, EEPROM) |
| Logic Elements / Macrocells | — | 192 macrocells |
| Usable Gates | — | 3.75K (typical) |
| User I/Os | — | 124 |
| Recuento de pines | — | 160 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Internal Frequency | — | 167 MHz |
| Supply Voltage (VCCINT) | — | 5.0 V |
| Supply Voltage (VCCIO) | — | 5.0 V |
| In-System Programmability | — | Yes (5V ISP, JTAG) |
| Boundary-Scan Support | — | IEEE 1149.1 (JTAG) |
| Temperatura de funcionamiento | — | 0C to +70C (industrial, 'N' suffix) |
| Technology | — | 5V CMOS, EEPROM configuration memory |
| Logic Family | — | CMOS |
| Propagation Delay | — | 7.5 ns to 10 ns (speed grade dependent) |
| Estado RoHS | — | Compliant (per lead-free PQFP package marking) |