EPM7192SQC160-15 vs EPM7192SQI160-10N 对比

详细并排对比 EPM7192SQC160-15 出自 Altera 和 EPM7192SQI160-10N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM7192SQC160-15 EPM7192SQI160-10N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 不推荐新设计
库存状态 有库存 有库存
单价(USD) $8.75 $35.90
Family MAX 7000S MAX 7000
Device Type CPLD - Complex Programmable Logic Device —
Number of Macrocells 192 —
Number of Logic Array Blocks 4 —
Number of Usable Gates 3750 —
User I/O Pins 124 —
Pin-to-Pin Logic Delay (tPD) 15 ns —
Maximum Operating Frequency 76.9 MHz —
电源电压 5.0 V —
Programmability In-System (ISP) via JTAG IEEE Std 1149.1 —
Configuration Memory EEPROM, non-volatile —
封装 PQFP-160 PQFP-160 (QFP-160, plastic)
安装类型 Surface Mount Surface Mount
工作温度范围 [DATA_NEEDED: operating temperature range] —
Process Technology CMOS, EEPROM-based —
Series — MAX 7000S
Architecture — Second-generation MAX (CMOS, EEPROM)
Logic Elements / Macrocells — 192 macrocells
Usable Gates — 3.75K (typical)
User I/Os — 124
引脚数量 — 160
Pin-to-Pin Delay (tPD) — 10 ns
Maximum Internal Frequency — 167 MHz
Supply Voltage (VCCINT) — 5.0 V
Supply Voltage (VCCIO) — 5.0 V
In-System Programmability — Yes (5V ISP, JTAG)
Boundary-Scan Support — IEEE 1149.1 (JTAG)
工作温度 — 0C to +70C (industrial, 'N' suffix)
Technology — 5V CMOS, EEPROM configuration memory
Logic Family — CMOS
Propagation Delay — 7.5 ns to 10 ns (speed grade dependent)
RoHS 状态 — Compliant (per lead-free PQFP package marking)

数据手册与资源

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