EPM7256EGC192-12 vs EPM7256EQC160-12 Comparación
Comparación detallada lado a lado de EPM7256EGC192-12 por Intel y EPM7256EQC160-12 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM7256EGC192-12 | EPM7256EQC160-12 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $17,85 | $17,10 |
| Family | MAX 7000 | MAX 7000 |
| Device Logic Cells | 256 macrocells | — |
| Usable Gates | 5,000 | — |
| Propagation Delay (tPD) | 12 ns | — |
| Maximum Operating Frequency | 90.9 MHz | 90.9 MHz |
| User I/O Pins | 164 | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V (5 V nominal) | — |
| Encapsulado | 192-pin CPGA (Ceramic Pin Grid Array) | — |
| Tipo de montaje | Through Hole (PGA socket) | Surface Mount |
| Technology | CMOS, EEPROM-based | — |
| Temperatura de funcionamiento | 0C to +70C (commercial) | 0 °C to 70 °C (Commercial) |
| Programmable Interface | JTAG (IEEE 1149.1) / ISP | — |
| Logic Blocks (LABs) | 16 | — |
| Macrocells per LAB | 16 | — |
| Estado RoHS | Compliant | Compliant (lead-free PQFP) |
| Lead-Free | Yes | — |
| JEDEC Package Code | S-CPGA-P192 | — |
| Programmable Type | — | EE PLD (CPLD, in-system programmable EEPROM) |
| Number of Macrocells | — | 256 |
| Number of Logic Blocks / LABs | — | 16 |
| Number of Gates | — | 5,000 usable gates |
| Number of I/O Pins | — | 132 |
| Propagation Delay tPD (max) | — | 12 ns |
| Supply Voltage VCCINT | — | 4.75 V to 5.25 V |
| I/O Standard | — | 5 V TTL, 3.3 V compatible |
| Encapsulado / Carcasa | — | 160-pin PQFP (28 × 28 mm) |
| Process Technology | — | CMOS EEPROM |
| Programming Interface | — | JTAG (IEEE 1532 / IEEE 1149.1) |
| Estado del ciclo de vida | — | Obsolete |