EPM7256EGC192-12 vs EPM7256EQC160-12 Comparison
Detailed side-by-side comparison of EPM7256EGC192-12 by Intel and EPM7256EQC160-12 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM7256EGC192-12 | EPM7256EQC160-12 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Obsolete |
| Family | MAX 7000 | MAX 7000 |
| Device Logic Cells | 256 macrocells | — |
| Usable Gates | 5,000 | — |
| Propagation Delay (tPD) | 12 ns | — |
| Maximum Operating Frequency | 90.9 MHz | 90.9 MHz |
| User I/O Pins | 164 | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V (5 V nominal) | — |
| Package | 192-pin CPGA (Ceramic Pin Grid Array) | — |
| Mounting Type | Through Hole (PGA socket) | Surface Mount |
| Technology | CMOS, EEPROM-based | — |
| Operating Temperature | 0C to +70C (commercial) | 0 °C to 70 °C (Commercial) |
| Programmable Interface | JTAG (IEEE 1149.1) / ISP | — |
| Logic Blocks (LABs) | 16 | — |
| Macrocells per LAB | 16 | — |
| RoHS Status | Compliant | Compliant (lead-free PQFP) |
| Lead-Free | Yes | — |
| JEDEC Package Code | S-CPGA-P192 | — |
| Programmable Type | — | EE PLD (CPLD, in-system programmable EEPROM) |
| Number of Macrocells | — | 256 |
| Number of Logic Blocks / LABs | — | 16 |
| Number of Gates | — | 5,000 usable gates |
| Number of I/O Pins | — | 132 |
| Propagation Delay tPD (max) | — | 12 ns |
| Supply Voltage VCCINT | — | 4.75 V to 5.25 V |
| I/O Standard | — | 5 V TTL, 3.3 V compatible |
| Package / Case | — | 160-pin PQFP (28 × 28 mm) |
| Process Technology | — | CMOS EEPROM |
| Programming Interface | — | JTAG (IEEE 1532 / IEEE 1149.1) |
| Lifecycle Status | — | Obsolete |