EPM9560GC280-15 vs EPM9560ARC240-10N Comparación
Comparación detallada lado a lado de EPM9560GC280-15 por Altera y EPM9560ARC240-10N por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Altera
EPM9560GC280-15 - MAX 9000 CPLD, 560 Macro Cells, 15ns CPGA280 | Intel / Altera
EPM9560GC280-15 ObsoleteAltera
EPM9560ARC240-10N - MAX 9000 CPLD 560 Macro 191 IOs | Altera/Intel
EPM9560ARC240-10N ObsoleteComparación de especificaciones
| Parámetro | EPM9560GC280-15 | EPM9560ARC240-10N |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $115,00 | $19,50 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EE PLD (CMOS EEPROM-based CPLD) | — |
| Macro Cells | 560 | 560 |
| Typical Gates | 12,000 | — |
| Maximum Operating Frequency | 117.6 MHz | — |
| Propagation Delay (tpd) | 15 ns (speed grade -15) | — |
| Propagation Delay (alternate datasheet figure) | 16.6 ns | — |
| Supply Voltage (VCCINT/VCCIO) | 5.0 V | — |
| Operating Temperature (Commercial) | 0C to +70C | — |
| Package Type | CPGA-280 (Ceramic Pin Grid Array, 280 pins) | — |
| Tipo de montaje | Through-Hole | Surface Mount |
| Programmability | In-System Programmable (ISP) via JTAG IEEE 1149.1 | In-system, EEPROM-based (non-volatile) |
| Technology | CMOS EEPROM, 0.5 um process (MAX third-gen) | — |
| Architecture | Multiple Array MatriX (MAX) | — |
| Estado RoHS | Non-compliant (ceramic CPGA, contains lead) | Non-RoHS (legacy Altera part) |
| Estado del ciclo de vida | Obsolete (legacy Altera MAX 9000 family) | — |
| Logic Family | — | MAX 9000 (CPLD) |
| Process Technology | — | CMOS EEPROM |
| User I/Os | — | 191 |
| Logic Array Blocks (LABs) | — | 16 |
| Propagation Delay (tPD) | — | 10 ns |
| Internal Frequency (fMAX) | — | 145 MHz |
| Supply Voltage (VCCINT) | — | 5.0 V |
| Temperatura de funcionamiento | — | 0°C to +70°C (Commercial) |
| Encapsulado | — | 240-pin RQFP (32x32 mm) |
| Programming Interface | — | IEEE 1149.1 JTAG / ByteBlaster |
| I/O Standard | — | 5.0 V TTL-compatible |