EPM9560GC280-15 vs EPM9560ARC240-10N Comparison
Detailed side-by-side comparison of EPM9560GC280-15 by Altera and EPM9560ARC240-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560GC280-15 - MAX 9000 CPLD, 560 Macro Cells, 15ns CPGA280 | Intel / Altera
EPM9560GC280-15 ObsoleteAltera
EPM9560ARC240-10N - MAX 9000 CPLD 560 Macro 191 IOs | Altera/Intel
EPM9560ARC240-10N ObsoleteSpecification Comparison
| Parameter | EPM9560GC280-15 | EPM9560ARC240-10N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $115.00 | $19.50 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EE PLD (CMOS EEPROM-based CPLD) | β |
| Macro Cells | 560 | 560 |
| Typical Gates | 12,000 | β |
| Maximum Operating Frequency | 117.6 MHz | β |
| Propagation Delay (tpd) | 15 ns (speed grade -15) | β |
| Propagation Delay (alternate datasheet figure) | 16.6 ns | β |
| Supply Voltage (VCCINT/VCCIO) | 5.0 V | β |
| Operating Temperature (Commercial) | 0C to +70C | β |
| Package Type | CPGA-280 (Ceramic Pin Grid Array, 280 pins) | β |
| Mounting Type | Through-Hole | Surface Mount |
| Programmability | In-System Programmable (ISP) via JTAG IEEE 1149.1 | In-system, EEPROM-based (non-volatile) |
| Technology | CMOS EEPROM, 0.5 um process (MAX third-gen) | β |
| Architecture | Multiple Array MatriX (MAX) | β |
| RoHS Status | Non-compliant (ceramic CPGA, contains lead) | Non-RoHS (legacy Altera part) |
| Lifecycle Status | Obsolete (legacy Altera MAX 9000 family) | β |
| Logic Family | β | MAX 9000 (CPLD) |
| Process Technology | β | CMOS EEPROM |
| User I/Os | β | 191 |
| Logic Array Blocks (LABs) | β | 16 |
| Propagation Delay (tPD) | β | 10 ns |
| Internal Frequency (fMAX) | β | 145 MHz |
| Supply Voltage (VCCINT) | β | 5.0 V |
| Operating Temperature | β | 0Β°C to +70Β°C (Commercial) |
| Package | β | 240-pin RQFP (32x32 mm) |
| Programming Interface | β | IEEE 1149.1 JTAG / ByteBlaster |
| I/O Standard | β | 5.0 V TTL-compatible |