EPM9560GC280-20 vs EPM9560GM280-15 Comparación
Comparación detallada lado a lado de EPM9560GC280-20 por Altera y EPM9560GM280-15 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM9560GC280-20 | EPM9560GM280-15 |
|---|---|---|
| Marca | Altera | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $360,00 | $110,00 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | EE PLD (EEPROM-based) |
| Usable Gates | 12,000 | — |
| Macrocells | 560 | 560 |
| Maximum User I/O | 212 | — |
| Pin-to-Pin Delay | 20 ns (speed grade -20) | — |
| Counter Frequency (max) | 100 MHz | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V (5.0 V nominal) | — |
| I/O Voltage | 3.3 V or 5.0 V configurable | — |
| Process Technology | CMOS EEPROM | CMOS EEPROM |
| Encapsulado | 280-pin CPGA (Ceramic Pin Grid Array) | FineLine BGA-280 (GM) |
| Temperatura de funcionamiento | [DATA_NEEDED: commercial/industrial/military grade] | -40C to +85C (industrial) |
| In-System Programming | Yes, via IEEE 1149.1 JTAG | — |
| Tipo de montaje | Through-Hole (CPGA socket) | — |
| Estado RoHS | [DATA_NEEDED: CPGA package historically contains Pb; likely non-compliant] | ROHS3 Compliant |
| Flip-Flops | — | 772 |
| User I/O | — | 216 |
| Logic Array Blocks (LABs) | — | 35 (16 macrocells each) |
| Supply Voltage (Nominal) | — | 5.0 V |
| Supply Voltage (Max) | — | 5.5 V |
| I/O Logic Level Support | — | 3.3 V or 5 V |
| Pin-to-Pin Delay (tPD) | — | 15 ns (speed grade -15) |
| In-System Programmability | — | Yes (5V ISP via JTAG IEEE 1149.1) |
| Nivel MSL | — | 3 (168 Hours) |