EPM9560RC208-16 vs EPM9560RC208-18 Comparación
Comparación detallada lado a lado de EPM9560RC208-16 por Intel y EPM9560RC208-18 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPM9560RC208-16 - MAX 9000 CPLD, 560 Macrocells, 208-RQFP | Intel / Altera
EPM9560RC208-16 NrndComparación de especificaciones
| Parámetro | EPM9560RC208-16 | EPM9560RC208-18 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | NRND | Fin de vida |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $52,40 | $0,00 |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Elements / Macrocells | 560 macrocells | — |
| Typical Gates | 12,000 gates | — |
| Usable Gates | 12,000 (typical) | 12,000 gates |
| Pin-to-Pin Delay (tPD) | 16 ns | — |
| Maximum Internal Frequency (fMAX) | 117.6 MHz | — |
| Supply Voltage (VCCINT / VCCIO) | 5 V | — |
| User I/O Pins | 416 | — |
| Encapsulado | 208-pin Power Quad Flat Pack (RQFP) | 208-pin RQFP (Power Quad Flat Pack) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Process Technology | 0.35 µm CMOS EEPROM | — |
| Programmability | In-system via JTAG (IEEE 1149.1) | — |
| Temperatura de funcionamiento | [DATA_NEEDED: industrial/commercial temperature grade] | [DATA_NEEDED: operating temperature range] |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Speed Grade | -16 | — |
| Device Family | — | MAX 9000 (EPM9560) |
| Logic Type | — | EEPROM-based Complex Programmable Logic Device (CPLD) |
| Macrocells | — | 560 macrocells |
| Propagation Delay (tPD) | — | 18 ns (speed grade -18) |
| Maximum Operating Frequency | — | 117.6 MHz (family -15 grade reference) |
| Tensión de alimentación | — | 5 V |
| I/O Voltage Compatibility | — | 3.3 V or 5 V |
| User I/O Lines | — | 149 I/O lines |
| Flip-Flops | — | 772 flip-flops |
| Package JESD-30 Code | — | S-PQFP-G208 |
| Configuration Memory | — | EEPROM (non-volatile, no external config PROM) |
| Technology | — | CMOS |
| Estado del ciclo de vida | — | EOL / mature (per Altera product discontinuance notice) |