EPM9560RC240-10N vs EPM9560RC240-15C Comparación
Comparación detallada lado a lado de EPM9560RC240-10N por Intel y EPM9560RC240-15C por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPM9560RC240-10N - MAX 9000 CPLD 560 Macrocells 5V 240-Pin RQFP | Intel
EPM9560RC240-10N ⚠ Última compraComparación de especificaciones
| Parámetro | EPM9560RC240-10N | EPM9560RC240-15C |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $168,00 | $0,00 |
| Family | MAX 9000 | MAX 9000 |
| Architecture | Multiple Array MatriX (MAX) - 3rd generation | — |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 16 | — |
| User I/Os | 212 | — |
| Internal Operating Frequency | 144.9 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 10 ns (-10 speed grade) | — |
| Tensión de alimentación | 5.0 V | 5.0 V |
| Process Technology | 0.65 µm CMOS EEPROM | CMOS |
| Encapsulado | 240-pin RQFP (Plastic Quad Flat Pack) | 240-pin RQFP (PowerQuad II) |
| Programming Interface | JTAG (IEEE 1149.1) - in-system programmable | — |
| I/O Standards Supported | 5.0 V TTL/CMOS, 3.3 V PCI-compatible | — |
| Operating Temperature (Commercial) | 0 °C to +70 °C | — |
| Lead-Free Finish (N suffix) | Yes (Pb-free) | — |
| Estado RoHS | ROHS3 Compliant (per fpgalink.com listing) | [DATA_NEEDED: RoHS status] |
| Nivel de sensibilidad a la humedad (MSL) | 3 (168 hours) | — |
| Device Type | — | EEPROM-based CPLD |
| Logic Array Blocks | — | 20 |
| User I/O Pins | — | 187 |
| Maximum Internal Frequency | — | 117.6 MHz |
| Propagation Delay (tPD) | — | 15 ns |
| Operating Voltage Range | — | 3.3 V or 5 V |
| Terminal Pitch | — | 0.5 mm |
| Tipo de montaje | — | Surface Mount |
| Temperatura de funcionamiento | — | 0C to +70C (Commercial) |
| Configuration Technology | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes (ISP via JTAG) |
| JTAG Interface | — | IEEE 1149.1 boundary-scan |
| Nivel MSL | — | [DATA_NEEDED: MSL level] |