EPM9560RC240-1O vs EPM9560ARI240-10N Comparación
Comparación detallada lado a lado de EPM9560RC240-1O por Intel y EPM9560ARI240-10N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPM9560RC240-1O - MAX 9000 CPLD, 560 Macrocells, 216 I/O, RQFP-240 | Altera
EPM9560RC240-1O ⚠ Última compraIntel
EPM9560ARI240-10N - MAX 9000 CPLD, 560 Macrocells, 5V, 240-RQFP | Intel
EPM9560ARI240-10N NrndComparación de especificaciones
| Parámetro | EPM9560RC240-1O | EPM9560ARI240-10N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Última compra | NRND |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $51,07 | $105,00 |
| Family | MAX 9000 | MAX 9000 |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 35 | 16 |
| Maximum User I/O Pins | 216 | — |
| Propagation Delay (tPD) | 12 ns (typ, -1 speed grade) | 10 ns (-10 speed grade) |
| Global Setup Time (tFSU) | 3.0 ns | — |
| Clock-to-Output (tFCO) | 4.8 ns | — |
| Maximum Internal Frequency (fCNT) | 145 MHz | — |
| Supply Voltage (VCC) | 5.0 V | — |
| Operating Temperature (Grade) | -40C to +85C (industrial, "-1O" suffix) | — |
| Process Technology | CMOS EEPROM, 0.65 um | — |
| Programming | In-system programmable via IEEE 1149.1 JTAG | — |
| Architecture | Multiple Array MatriX (MAX), third generation | Multiple Array MatriX (MAX) - 3rd generation |
| Encapsulado | RQFP-240 (240-pin Reduced-height QFP) | 240-pin RQFP (RQFP-240 / PQFP-240) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | Compliant (per Altera/Intel product page) | — |
| Lead-Free | Yes | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| User I/Os | — | 216 (per digchip); 191 (per Mouser) |
| Maximum Internal Frequency | — | 144.9 MHz (typical); 145 MHz (per digchip) |
| Tensión de alimentación | — | 5.0 V nominal (4.5 V min, 5.5 V max) |
| Logic Family | — | CMOS, EEPROM-based |
| In-System Programmability | — | Yes (5.0 V ISP via JTAG) |
| Temperatura de funcionamiento | — | -40C to +85C (industrial) |
| JTAG (IEEE 1149.1) | — | Yes |
| Lead-Free / RoHS | — | [DATA_NEEDED: lead-free / RoHS status not in provided data] |