EPM9560RC240-1O vs EPM9560ARI240-10N 对比
详细并排对比 EPM9560RC240-1O 出自 Intel 和 EPM9560ARI240-10N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Intel
EPM9560RC240-1O - MAX 9000 CPLD, 560 Macrocells, 216 I/O, RQFP-240 | Altera
EPM9560RC240-1O ⚠ 最后一次采购Intel
EPM9560ARI240-10N - MAX 9000 CPLD, 560 Macrocells, 5V, 240-RQFP | Intel
EPM9560ARI240-10N Nrnd规格对比
| 参数 | EPM9560RC240-1O | EPM9560ARI240-10N |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $51.07 | $105.00 |
| Family | MAX 9000 | MAX 9000 |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 35 | 16 |
| Maximum User I/O Pins | 216 | — |
| Propagation Delay (tPD) | 12 ns (typ, -1 speed grade) | 10 ns (-10 speed grade) |
| Global Setup Time (tFSU) | 3.0 ns | — |
| Clock-to-Output (tFCO) | 4.8 ns | — |
| Maximum Internal Frequency (fCNT) | 145 MHz | — |
| Supply Voltage (VCC) | 5.0 V | — |
| Operating Temperature (Grade) | -40C to +85C (industrial, "-1O" suffix) | — |
| Process Technology | CMOS EEPROM, 0.65 um | — |
| Programming | In-system programmable via IEEE 1149.1 JTAG | — |
| Architecture | Multiple Array MatriX (MAX), third generation | Multiple Array MatriX (MAX) - 3rd generation |
| 封装 | RQFP-240 (240-pin Reduced-height QFP) | 240-pin RQFP (RQFP-240 / PQFP-240) |
| 安装类型 | Surface Mount | Surface Mount |
| RoHS 状态 | Compliant (per Altera/Intel product page) | — |
| Lead-Free | Yes | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| User I/Os | — | 216 (per digchip); 191 (per Mouser) |
| Maximum Internal Frequency | — | 144.9 MHz (typical); 145 MHz (per digchip) |
| 电源电压 | — | 5.0 V nominal (4.5 V min, 5.5 V max) |
| Logic Family | — | CMOS, EEPROM-based |
| In-System Programmability | — | Yes (5.0 V ISP via JTAG) |
| 工作温度 | — | -40C to +85C (industrial) |
| JTAG (IEEE 1149.1) | — | Yes |
| Lead-Free / RoHS | — | [DATA_NEEDED: lead-free / RoHS status not in provided data] |