EPM9560RC304-2 vs EPM9560RC304-2N Comparación
Comparación detallada lado a lado de EPM9560RC304-2 por Intel y EPM9560RC304-2N por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPM9560RC304-2 - MAX 9000 EPLD 12k Gates 304-pin RQFP | Intel / Altera
EPM9560RC304-2 ObsoleteComparación de especificaciones
| Parámetro | EPM9560RC304-2 | EPM9560RC304-2N |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $55,00 | $149,00 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (EPLD - Erasable PLD) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | Approximately 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 16 | [DATA_NEEDED: LAB count] |
| Macrocells | [DATA_NEEDED: macrocell count] | 560 |
| User I/O Pins | 304 | — |
| Encapsulado | 304-pin RQFP (RC) | RQFP/RBGA-class 304-pin plastic carrier (RC304) |
| Speed Grade | -2 | -2 (mid-band) |
| Core Supply Voltage | 5.0 V | — |
| I/O Supply Voltage | 5.0 V | — |
| Programming Technology | EEPROM (in-system programmable) | EPROM/EEPROM, non-volatile |
| JTAG Support | IEEE Std. 1149.1 (boundary-scan + ISP) | — |
| Temperatura de funcionamiento | Commercial (0C to +70C) | 0C to +70C (commercial) |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| Architecture | Multiple Array MatriX (MAX) - third generation | — |
| Configuration Memory | On-chip EEPROM (non-volatile) | — |
| Maximum User I/O | — | [DATA_NEEDED: user I/O count] |
| Propagation Delay (tPD) | — | [DATA_NEEDED: tPD value in ns] |
| Supply Voltage (VCCINT) | — | 5.0 V |
| I/O Voltage Tolerance | — | 5.0 V (3.3 V with level shifting) |
| In-System Programming | — | IEEE 1149.1 JTAG |
| Nivel MSL | — | [DATA_NEEDED: MSL rating] |